We will admit it: mostly when we see a homebrew CPU design on an FPGA, it is a simple design that wouldn’t raise any eyebrows in the 1970s or 1980s. Not so with [Henry Wong’s] design, though. His ...

If you've been reading Ars for any length of time, then you know that there are two terms that always come up in any of my articles: pipelining and superscalar execution. These two fundamental ...

As the complexity of advanced DSPs increases, it is becoming much more difficult to program them effectively to meet system performance goals. The possibility of assembler level programming becomes ...

Selecting the right DSP for a particular application involves much more analysis than simply selecting the one that touts the highest clock speeds or the one that offers the most arithmetic resources.

In this video from SC15, Dr. Rosa Badia from BSC/CNS presents: Superscalar Programming Models – Making Applications Platform Agnostic. “Programming models play a key role providing abstractions of the ...

The DesignWare ARC HS4x and HS4xD processor family from Synopsys is targeted at high performance embedded applications. Featuring five variants, each available in single, dual and quad core ...

A new technical paper titled “Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution” was published by researchers at ETH Zurich, Università di ...

As I’m sure many of you know, x86 architecture has been around for quite some time. It has its roots in Intel’s early 8086 processor, the first in the family. Indeed, even the original 8086 inherits a ...

The Isaiah processor is said to combine all the latest advances in x86 processor technology, including a 64-bit superscalar speculative out-of-order microarchitecture, high-performance multimedia ...

In my previous article, Understanding the Microprocessor, I gave a high-level overview of what a microprocessor is and how it functions. I talked about the kinds of tasks it performs and the different ...